class control:
    def signalIn(self, oppCode):
        if (oppCode == 0b000000): # rtype
            self.regDst = 1
            self.aluSrc = 0
            self.memToReg = 0
            self.regWrite = 1
            self.memRead = 0
            self.memWrite = 0
            self.branch = 0
            self.aluOp = 0b10

        elif (oppCode == 0b001000): #addi?
            self.regDst = 0
            self.aluSrc = 1
            self.memToReg = 0
            self.regWrite = 1
            self.memRead = 0
            self.memWrite = 0
            self.branch = 0
            self.aluOp = 0b00
            
        elif (oppCode == 0b000100):
            self.regDst = 0
            self.aluSrc = 0
            self.memToReg = 0
            self.regWrite = 0
            self.memRead = 0
            self.memWrite = 0
            self.branch = 1
            self.aluOp = 0b01

    def getRegDst(self):
        return self.regDst
    def getAluSrc(self):
        return self.aluSrc
    def getAluOp(self):
        return self.aluOp
    def getRegWrite(self):
        return self.regWrite
    def getBranch(self):
        return self.branch
    

